Cadence Jobs

AI Training Hardware Architect

Permanent Job

United Arab Emirates

3-5 years

Hardware Description Languages VHDL Verification Cadence front-end workflows Synopsys systemverilog Verilog Scripting Systemc

a day ago

Hardware Optimization Engineer - AI Training Systems

Permanent Job

Saudi Arabia

3-5 years

Hardware Description Languages VHDL Verification Cadence front-end workflows Synopsys systemverilog Verilog Scripting Systemc

a day ago

Signal Integrity/ Power Integrity Engineer (Staff/Senior Staff)

Permanent Job

Penang ,

Bayan ,

Malaysia

0-2 years

Power Distribution 3D passive channel modeling Electromagnetic Pcb Design ANSYS HFSS Keysight ADS 25G/56G Ethernet specification Synopsys HSPICE 3-D field solver ASIC SerDes channel extraction S-parameters theory parallel interfaces VNA measurements power integrity analysis stack-up definition TDR Sigrity Power SI MSEE Transmission-line DDR3/4 Mentor ICX Cst Microwave Studio multi-gigabit serial links BSEE SerDes design Pcb Signal Integrity PCB layout rules Written Communication Oral Communication Cadence SPECCTRAQuest SiSoft SI-Auditor SAS Pcie Python VB Perl Matlab

a month ago

Associate III - VLSI (IP Design Verification)

Permanent Job

Bayan ,

Malaysia

4-6 years

LINT AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Circuit Design Sta DC/RTL-C ICC/Innovus/Olympus Simulators Vlsi FinFet Cadence Mentor Microprocessor architecture FDSOI Uvm CMOS Calibre Design Analog Layout Synthesis Dft Physical Verification VHDL CDC/RDC Extraction PT/Tempus Processor Hardening Assembly Spice ETS/TK/FS Verification Soft / Hard / Mixed Signal IP Design Physical Design Floorplan Synopsys Clocks P&R C Makefile Verilog System Verilog TCL/TK FPGA Design C++ Perl

30 days ago

Associate III - VLSI (Analog Circuit Design)

Permanent Job

Bayan ,

Malaysia

0-2 years

AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Simulators FinFet Mentor Uvm CMOS Calibre Analog Layout Physical Verification CDC/RDC Learning Skills problem-solving skills PT/Tempus Communication Skills Technical Skills ETS/TK/FS Floorplan Analytical Reasoning Synopsys LINT Circuit Design Sta DC/RTL-C ICC/Innovus/Olympus Attention To Details Cadence Microprocessor architecture FDSOI Synthesis Dft VHDL Extraction Processor Hardening Assembly design knowledge Spice Soft / Hard / Mixed Signal IP Design Physical Design Clocks P&R C Makefile System Verilog FPGA Design C++ Verilog TCL/TK Perl

30 days ago

Associate III - VLSI (STA)

Permanent Job

Bayan ,

Malaysia

0-2 years

LINT AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Circuit Design Sta DC/RTL-C ICC/Innovus/Olympus Simulators Attention To Details FinFet Cadence Mentor Microprocessor architecture FDSOI Uvm CMOS Calibre Analog Layout Synthesis Dft Physical Verification VHDL CDC/RDC Extraction problem-solving skills PT/Tempus Processor Hardening Communication Skills Assembly Spice ETS/TK/FS Soft / Hard / Mixed Signal IP Design Physical Design Floorplan Analytical Reasoning Synopsys Clocks P&R C Makefile Verilog System Verilog TCL/TK FPGA Design C++ Perl

30 days ago

Associate III - VLSI (DFT)

Permanent Job

Bayan ,

Malaysia

0-2 years

AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Simulators checklists scan timing checks FinFet Mentor Uvm CMOS Calibre Analog Layout Physical Verification CDC/RDC problem-solving skills PT/Tempus Communication Skills design life-cycle process ETS/TK/FS Floorplan Analytical Reasoning Synopsys LINT Circuit Design Sta DC/RTL-C ICC/Innovus/Olympus Attention To Details Cadence Microprocessor architecture FDSOI Synthesis Dft VHDL Extraction Validation Processor Hardening Assembly MBIST generation Spice Soft / Hard / Mixed Signal IP Design ATPG test pattern generation Physical Design DFT Implementation Clocks P&R C Makefile System Verilog FPGA Design C++ Verilog TCL/TK Templates Perl

30 days ago

Public Sector Sales Account Manager (Must have KSA experience)

Permanent Job

Saudi Arabia

Fresher

High-tech Industry Compliance Pr Legal Public Sector Sales Quota Veritas Offerings Enterprise Accounts New Business Operating Cadence Marketing Sales Account/Relationships Relationships Process Customer Needs Virtual Team/Resources Infrastructure Software Sales Capacity revenue recognition Sales Contact Channel Sales Specialists Territory Plans Sales Operations Coverage Model Government Sector Account Plans Geographically Defined Territory New Opportunities TSS Revenue Targets Gap/White Space Analysis Decision Makers Cmc

a month ago

Printed Circuit Board Design Engineer

Permanent Job

Saudi Arabia ,

Riyadh

3-4 years

Altium Designer Simulation Pcb Design Analytical Skills Problem-solving PCB fabrication Pcb Layout Teamwork schematic capture electrical engineering principles Circuit Design communication Cadence Allegro

4 months ago

Semi Conductor - Physical Design

Permanent Job

Egypt ,

Cairo

8-10 years

Sta signal integrity closure pin assignment EM Timing Analysis Cadence Ir LVS RTL2GDSII Floor Planning PNR ERC DRC ECO generation Synopsys PTSI Makefile Perl Python Tcl

4 months ago

Electrical Engineer

Permanent Job

Penang ,

Bayan ,

Malaysia

0-2 years

design CAD tools digital controller GNSS Cadence Video Layout Rf schematic capture EE HW development Audio Validation digital connectivity circuit WiFi Bluetooth

5 months ago

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Cadence Jobs

AI Training Hardware Architect

Hardware Optimization Engineer - AI Training Systems

Signal Integrity/ Power Integrity Engineer (Staff/Senior Staff)

Associate III - VLSI (IP Design Verification)

Associate III - VLSI (Analog Circuit Design)

Associate III - VLSI (STA)

Associate III - VLSI (DFT)

Public Sector Sales Account Manager (Must have KSA experience)

Printed Circuit Board Design Engineer

Semi Conductor - Physical Design

Electrical Engineer